Gate Electrode Formation Process Optimization in a GaAs FET Device
نویسندگان
چکیده
This paper will describe how a gate electrode formation process in a GaAs FET device was analyzed and optimized for increased CD control and product throughput. Optimizations included a new resist in the photolithography process, a new solvent and equipment type in the metal liftoff process, and a new dome structure in the metal deposition process. These process optimizations resulted in a gate electrode formation process with improved CD control, a liftoff process with increased throughput, and the elimination of liftoff reworks.
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